代做ECE 2060 Introduction to Digital Logic, Spring 2024代写留学生Matlab语言程序

日期：2024-04-27 05:12

ECE 2060 Introduction to Digital Logic, Spring 2024

Review, Final Exam

.    The final exam will be held Friday 04/26/2023, 4:00pm-5:45pm online. To give you enough time to download the paper and upload your answers, the paper will be posted at 3:55pm under the "Files/Exams" folder. Please submit your answers by 5:50pm. You do not need to log into Carmen or any proctor tool for the exam.

.    You are NOT allowed to have discussions with or receive any assistance from other people during the exam.

.    Comparisons will be done among exam papers for integrity check.

.    The exam is open book, open note. However, computers, pads, or other devices can only be used to download/upload exam papers, write answers, and view book/lecture notes. Calculators or calculation/programming functions on any devices are NOT allowed unless you get special permission from SLDS.

.    Coverage from lectures: from the first lecture to the last lecture. The material before mid-term 1, between mid-term 1 & 2, and after mid-term 2 will account for around 30%, 30%, 40%, respectively, of the final exam problems.

.    Me and the GTAs will hold our office hours until the exam. I will also add an office hour 1-2pm on 04/25 in case you have more questions.

.    This review covers the materials discussed after mid-term 2. Previous materials are covered in the reviews for mid-term 1 and 2.

Topics

.    Registers and counters

o Shift registers and variations

o Binary counter design using D flip-flops

o Loadable counter

o Counter with arbitrary sequence and arbitrary number of states

o Unspecified state of the counter

.    Sequential circuit analysis

o Moore vs Mealy machine

o Sequential circuit analysis procedure

. Derive flip-flop input equations, output equations, next-state equations

. Derive Transition & output table, state & output table

. Draw state diagram

.    Sequential circuit design

o Sequential circuit design procedure

. Design state diagram from problem specification; derive state & output table

. Decide state assignment and derive transition & output table

. Determine flip-flop input equations, output equations & next state equations

. Draw the circuit

o Understand that assigning states to different binary codes leads to different circuit complexity

o Alphanumeric state diagram, completeness & correctness

o Finite state machine design using transition list will NOT be tested.